DESIGN OF MOS INTEGRATED CIRCUITS AT HIGH TEMPERATURE.

Abstract

Areas which require high-temperature MOS circuits are instrumentations for geothermal and petroleum well-logging, space exploration, aero-propulsion systems, and other hostile environments. MOS digital circuits at high temperature are examined as well as the maximum operating temperature of MOS devices. Factors affecting high-temperature operation of these devices, including threshold voltage sensitivity, mobility degradation, leakage current characterization and interactions, zero-TC current in analog applications and reliability considerations, are discussed. Methods to reduce threshold voltage sensitivities, process modifications to reduce leakage current density at high temperature, circuit techniques to eliminate the leakage current effects, diode compensation, CMOS thermal latch-up and MOS scaling rules at high temperature are investigated. Experimental results of epitaxial diodes to verify the leakage current reduction effect are discussed.