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dc.contributor.advisorMartinez, Ralphen_US
dc.contributor.authorSon, Chang Won.
dc.creatorSon, Chang Won.en_US
dc.date.accessioned2011-10-31T17:11:10Z
dc.date.available2011-10-31T17:11:10Z
dc.date.issued1988en_US
dc.identifier.urihttp://hdl.handle.net/10150/184534
dc.description.abstractThis dissertation is concerned with the design of a generic gateway which provides an interoperability between dissimilar computer networks. The generic gateway is decomposed with subnetwork dependent blocks and subnetwork independent blocks. The subnetwork dependent block is responsible to communicate with subnetwork nodes. The subnetwork independent block is responsible to interconnect the subnetwork dependent blocks. The communications between subnetwork dependent and independent blocks are done by service access points which defined independently to any specific subnetworks. Formal specification of a generic gateway is provided by LOTOS. The generic gateway specification is tested by a verifiable test method which is proposed in this dissertation. The correctness of the specification has been verified while the specified model is simulated. The major difference between conventional simulation and the verifiable test is in the objective of simulation. In the verifiable test method, the semantical properties are examined during the simulation process. The tester can be either human observer or other process.
dc.language.isoenen_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.subjectComputer networks.en_US
dc.subjectComputer network protocols.en_US
dc.subjectComputer interfaces.en_US
dc.titleFunctional description and formal specification of a generic gateway.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.identifier.oclc701552506en_US
thesis.degree.grantorUniversity of Arizonaen_US
thesis.degree.leveldoctoralen_US
dc.contributor.committeememberHill, Fredricken_US
dc.contributor.committeememberKuo, Sy-Yenen_US
dc.identifier.proquest8905787en_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.namePh.D.en_US
refterms.dateFOA2018-06-16T17:34:42Z
html.description.abstractThis dissertation is concerned with the design of a generic gateway which provides an interoperability between dissimilar computer networks. The generic gateway is decomposed with subnetwork dependent blocks and subnetwork independent blocks. The subnetwork dependent block is responsible to communicate with subnetwork nodes. The subnetwork independent block is responsible to interconnect the subnetwork dependent blocks. The communications between subnetwork dependent and independent blocks are done by service access points which defined independently to any specific subnetworks. Formal specification of a generic gateway is provided by LOTOS. The generic gateway specification is tested by a verifiable test method which is proposed in this dissertation. The correctness of the specification has been verified while the specified model is simulated. The major difference between conventional simulation and the verifiable test is in the objective of simulation. In the verifiable test method, the semantical properties are examined during the simulation process. The tester can be either human observer or other process.


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