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dc.contributor.authorYeh, Jang-Hun.
dc.creatorYeh, Jang-Hun.en_US
dc.date.accessioned2011-10-31T18:25:07Z
dc.date.available2011-10-31T18:25:07Z
dc.date.issued1994en_US
dc.identifier.urihttp://hdl.handle.net/10150/186964
dc.description.abstractIn this dissertation, the design and applications of substrate mode holograms for free-space optical interconnections at the board packaging level will be presented. A number of design issues are examined including the factors affecting the design and fabrication accuracy, the environmental stability, and the coupling properties of substrate mode holograms. Theoretical modeling and experimental results are given for substrate mode holograms fabricated in dichromated gelatin emulsions. Realization of basic interconnect functions with single and multiplexed substrate mode holograms for a general optical interconnect system is also illustrated. Specifically, this dissertation describes the applications of substrate mode holograms for two optical interconnect systems: optical clock distribution and optical bus systems. The optical clock distribution system is designed to achieve synchronization on each processor board with an H-tree distribution scheme. The performance of the proposed optical clock distribution system is evaluated. An experimental system is demonstrated with a 622 MHz clock signal distributed with 36 ps of timing jitter and less than 10 ps of clock skew. The optical bus system is designed for information exchange between processor boards on the backplane of a multiprocessor system. Each board requires only one set of transmitter/receiver arrays to broadcast signals through a common set of free-space bus channels. The broadcasting operation for a 622 Mb/s transfer rate is also experimentally demonstrated.
dc.language.isoenen_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.titleBoard-level optical interconnections with substrate mode holograms.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.contributor.chairKostuk, Raymonden_US
thesis.degree.grantorUniversity of Arizonaen_US
thesis.degree.leveldoctoralen_US
dc.contributor.committeememberBurke, Jamesen_US
dc.contributor.committeememberNeifeld, Marken_US
dc.contributor.committeememberGmitro, Arthuren_US
dc.contributor.committeememberReagan, Johnen_US
dc.identifier.proquest9517575en_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.namePh.D.en_US
dc.description.noteThis item was digitized from a paper original and/or a microfilm copy. If you need higher-resolution images for any content in this item, please contact us at repository@u.library.arizona.edu.
dc.description.admin-noteOriginal file replaced with corrected file November 2023.
refterms.dateFOA2018-08-23T18:13:48Z
html.description.abstractIn this dissertation, the design and applications of substrate mode holograms for free-space optical interconnections at the board packaging level will be presented. A number of design issues are examined including the factors affecting the design and fabrication accuracy, the environmental stability, and the coupling properties of substrate mode holograms. Theoretical modeling and experimental results are given for substrate mode holograms fabricated in dichromated gelatin emulsions. Realization of basic interconnect functions with single and multiplexed substrate mode holograms for a general optical interconnect system is also illustrated. Specifically, this dissertation describes the applications of substrate mode holograms for two optical interconnect systems: optical clock distribution and optical bus systems. The optical clock distribution system is designed to achieve synchronization on each processor board with an H-tree distribution scheme. The performance of the proposed optical clock distribution system is evaluated. An experimental system is demonstrated with a 622 MHz clock signal distributed with 36 ps of timing jitter and less than 10 ps of clock skew. The optical bus system is designed for information exchange between processor boards on the backplane of a multiprocessor system. Each board requires only one set of transmitter/receiver arrays to broadcast signals through a common set of free-space bus channels. The broadcasting operation for a 622 Mb/s transfer rate is also experimentally demonstrated.


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