SOLID SOURCE CHEMICAL VAPOR DEPOSITION OF REFRACTORY METAL SILICIDES FOR VLSI INTERCONNECTS.

Abstract

Low resistance gate level interconnects can free the design of VLSI circuits from the R-C time constant limitations currently imposed by poly-silicon based technology. The hotwall low pressure chemical vapor deposition of molybdenum and tungsten silicide from their commercially available hexacarbonyls and silane is presented as a deposition method producing IC-compatible gate electrodes of reduced resistivity. Good hotwall deposition uniformity is demonstrated at low temperatures (200 to 300 C). The as-deposited films are amorphous by x-ray diffraction and can be crystallized in subsequent anneal steps with anneal induced film shrinkage of less than 12 percent. Surface oxide formation is possible during this anneal cycle. Auger spectroscopy and Rutherford backscattering results indicate that silicon-rich films can be deposited, and that the concentrations of carbon and oxygen incorporated from the carbonyl source are a function of the deposition parameters. At higher deposition temperatures and larger source throughput the impurity incorporation is markedly reduced. Good film adhesion and excellent step coverage are observed. Electrical measurements show that the film resistivities after anneal are comparable to those of sputtered or evaporated silicide films. Bias-temperature capacitance-voltage measurements demonstrate that direct silicide gate electrodes have properties comparable to standard metal-oxide-silicon systems. The substitution of CVD silicides for standard MOS gate metals appears to be transparent in terms of transistor performance, except for work function effects on the threshold voltage. The large wafer throughput and good step coverage of hotwall low pressure silicide deposition thus promises to become a viable alternative to the poly-silicon technology currently in use.