Hierarchical Simulation Method for Total Ionizing Dose Radiation Effects on CMOS Mixed-Signal Circuits
AuthorMikkola, Esko Olavi
AdvisorParks, Harold G.
Committee ChairParks, Harold G.
MetadataShow full item record
PublisherThe University of Arizona.
RightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
AbstractTotal ionizing dose (TID) radiation effects modeling and simulation on digital, analog and mixed signal systems remains a significant bottle neck in the development of radiation-hardened electronics. Unverified modeling techniques and the very high computational cost with today's commercial simulation tools are among the primary hindrances to the timely hardened IC design, particularly to the design in commercially available processes. SPICE-based methods have been used for total dose radiation degradation simulations. While SPICE is effective in predicting the circuit behavior under circumstances when the electrical parameters stay constant during operation, it's not effective predicting aging behavior with gradual change with time. Behavioral modeling language, such as VHDL-AMS is needed to effectively capture the time-dependent degradation in these parameters in response to environmental stresses, such as TID radiation.This dissertation describes a method for accurate and rapid TID effect simulation of complex mixed-signal circuits. The method uses a hierarchical structure where small sub-circuits, such as voltage comparators, references, etc. are simulated using SPICE. These SPICE simulations of small circuits for multiple radiation doses are used to tune behavioral VHDL-AMS models for the sub-circuits. The created behavioral models therefore contain the electrical circuit behavior combined with the radiation response. The entire combined system is then simulated using VHDL-AMS.In a simulation experiment that was used to validate the speed and accuracy of the new method, a commercial 8-bit sub-ranging analog to digital converter netlist containing more than 2000 MOS transistors was simulated with TID models using a contemporary SPICE-based method and the new method. The new method shortened the simulation time by three orders of magnitude, while accuracy remained within reasonable limits compared to the SPICE-based method. Moreover, the automated procedures for circuit node bias monitoring, TID model replacement and result collection that are included in the simulation code of the new method decreased the "hands-on" engineering work significantly. Results from an experiment where the new TID effect simulation method was used as a hardness assurance test procedure for integrated circuits designed to be operated in radiation-harsh environments are also included in this dissertation.
Degree ProgramElectrical & Computer Engineering