The implementation of the DEVS hierarchical abstract simulator using 286/10 single board computers
| dc.contributor.advisor | Zeigler, Bernard P. | en_US |
| dc.contributor.author | Cheng, Tsaichin Daniel, 1959- | |
| dc.creator | Cheng, Tsaichin Daniel, 1959- | en_US |
| dc.date.accessioned | 2013-03-28T10:10:19Z | |
| dc.date.available | 2013-03-28T10:10:19Z | |
| dc.date.issued | 1987 | en_US |
| dc.identifier.uri | http://hdl.handle.net/10150/276592 | |
| dc.description.abstract | The purpose of this experiment was to implement an alternative mapping realization of the hierarchical abstract simulator on the Intel Multibus 1 microprocessor system. Utilizing three 286/10 single board computers, integration of the M286 monitor with the hierarchical abstract simulator algorithm and execution of the distributed simulator system (DSS) was studied. Seven experiments were done on the DSS showing that the DSS correctly executes the algorithm of the hierarchical abstract simulator. An additional benefit is that parallelism is achieved even without external input: one simulator executes the internal transition function, with other executing the external transition function. This system has demonstrated that the hierarchical abstract simulator concept can be implemented on present-day, available hardware. | |
| dc.language.iso | en_US | en_US |
| dc.publisher | The University of Arizona. | en_US |
| dc.rights | Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author. | en_US |
| dc.subject | Discrete-time systems. | en_US |
| dc.subject | Digital computer simulation. | en_US |
| dc.title | The implementation of the DEVS hierarchical abstract simulator using 286/10 single board computers | en_US |
| dc.type | text | en_US |
| dc.type | Thesis-Reproduction (electronic) | en_US |
| dc.identifier.oclc | 19868660 | en_US |
| thesis.degree.grantor | University of Arizona | en_US |
| thesis.degree.level | masters | en_US |
| dc.identifier.proquest | 1332457 | en_US |
| thesis.degree.discipline | Graduate College | en_US |
| thesis.degree.discipline | Electrical and Computer Engineering | en_US |
| thesis.degree.name | M.S. | en_US |
| dc.identifier.bibrecord | .b16869965 | en_US |
| refterms.dateFOA | 2018-08-27T08:29:31Z | |
| html.description.abstract | The purpose of this experiment was to implement an alternative mapping realization of the hierarchical abstract simulator on the Intel Multibus 1 microprocessor system. Utilizing three 286/10 single board computers, integration of the M286 monitor with the hierarchical abstract simulator algorithm and execution of the distributed simulator system (DSS) was studied. Seven experiments were done on the DSS showing that the DSS correctly executes the algorithm of the hierarchical abstract simulator. An additional benefit is that parallelism is achieved even without external input: one simulator executes the internal transition function, with other executing the external transition function. This system has demonstrated that the hierarchical abstract simulator concept can be implemented on present-day, available hardware. |
