Fabrication and modeling of a floating-gate transistor for use as an electrostatic-discharge detector

Abstract

Electrostatic discharge is of great concern to the electronics industry. It degrades and destroys large numbers of integrated circuits at every step from fabrication through packaging and testing. The goal of this research effort was the development of a device that can be used to obtain quantitative information on electrostatic discharge (ESD) in the integrated-circuit workplace. The device that was developed can be utilized in two different modes. (1) It can be used to form ESD test wafers or test chips. (2) It can be incorporated on product chips to give the ESD history of devices or monitor the process line. The technology that was examined in this work was that for floating-gate PROMS. A simple analytical model for obtaining a parameter called the ESD factor was developed. The prototype detector was designed, fabricated and tested in the Semiconductor Processing Facility of the University of Arizona. Evidence will be presented that the FLOTOX type of EEPROM functions well in its application as an ESD detector.