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Publisher
The University of Arizona.Rights
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.Abstract
The computing power of recent massively parallel supercomputers is rising to the challenge of exploding demands for speed and memory that can be dedicated to a single problem. Still the difficulty in parallel programming persists and there is increasing demand for high level support for building discrete event models to execute on such platforms. We present a parallel DEVS-based (Discrete Event System Specification) simulation environment that can execute on distributed memory multicomputer systems. Underlying the environment is a parallel container class library for hiding the details of message passing technology while providing high level abstractions for hierarchical, modular DEVS models. The objective of Heterogeneous Container Class Library (HCCL) is to provide convenient object-oriented primitives for utilizing a collection of distributed computing resources to solve large problems and to speed up computations. Implemented by ensemble methods, parallel container class provides concurrency and a parallel computing paradigm at a higher level of abstraction encapsulating the details of the underlying message passing mechanisms. The difficulty of the synchronization problem was reduced by the inherent nature of ensemble method primitives. The DEVS/containers architecture for parallel simulation was first implemented on a massively parallel platform (CM-5) using CMMD message passing library. Then the SP2 implementation uses portable MPI so that the simulation architecture can be mapped to any heterogeneous and distributed computing environment. Observed performance of the C++ implementation working on the Thinking Machines CM-5 and IBM SP2 for high resolution ecosystem models demonstrates that high performance need not be sacrificed in providing high level abstractions to the discrete event modelling. The study of performance and exploitation of the natural parallelism in hierarchical discrete event models are also supported by capability of mapping DEVS models to the processors. The closure under coupling property and a mail message approach to interprocessor communication enable a user to easily partition and map DEVS models onto parallel platforms. We study how the mapping of DEVS models affect the performance and the efficiency of parallel simulation. The results are in agreement with earlier theory which predicts that optimal mappings are predictably influenced by communication overhead and communication/computation ratio.Type
textDissertation-Reproduction (electronic)
Degree Name
Ph.D.Degree Level
doctoralDegree Program
Graduate CollegeElectrical and Computer Engineering