AN HEURISTIC SEARCH APPROACH TO TEST SEQUENCE GENERATION FOR AHPL (A HARDWARE PROGRAMMING LANGUAGE) DESCRIBED SYNCHRONOUS SEQUENTIAL CIRCUITS
Author
Belt, John Edward, 1933-Issue Date
1973Keywords
Digital integrated circuits -- Testing.Logic circuits -- Testing.
Electric fault location -- Data processing.
AHPL (Computer program language)
Metadata
Show full item recordPublisher
The University of Arizona.Rights
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.Type
textDissertation-Reproduction (electronic)
Degree Name
Ph.D.Degree Level
doctoralDegree Program
Graduate CollegeElectrical Engineering
