Field programmable analog array synthesis

Abstract

Field programmable analog arrays (FPAAs), the analog counterparts of digital field programmable gate arrays (FPGAs), are suitable for prototyping analog circuits and implementing dynamically re-configurable analog systems. Although various FPAA architectures have been recently developed, very little work has been reported in the area of design automation for field programmable analog arrays. The lack of sophisticated FPAA synthesis tools is becoming one of the key limitations toward fully exploiting the advantages of FPAAs. To address this problem, this dissertation presents a complete synthesis flow that can automatically translate abstract-level analog function descriptions into FPAA circuit implementations. The proposed synthesis flow consists of function decomposition, macro-cell synthesis, placement & routing, and post-placement simulation subroutines. The function decomposition subroutine is aimed at decomposing high-order analog functions into low-order sub-functions. This not only increases the accuracy of the realized analog functions, but also reduces the routing complexity of the synthesized circuits. The macro-cell synthesis subroutine generates circuit implementations for the decomposed sub-functions. Then, FPAA placement & routing is performed to map the synthesized analog circuits onto FPAA chips. The final stage of the synthesis flow is post-placement simulation, which is used to verify that the synthesized circuits meet performance specifications. The major contributions of this dissertation are techniques developed for implementing the FPAA synthesis flow. In the work of function decomposition, we developed theoretical proofs for two optimization criteria that were previously used to search optimal function decomposition solutions. In addition, we developed more efficient procedures to search optimal function decomposition solutions. To implement the macro-cell synthesis subroutine, we proposed a modified signal flow graph to represent FPAA circuits. Graph transformations are introduced for exploring alternative circuit structures in FPAA synthesis. Finally, in the work of FPAA placement and routing, an efficient method for estimating FPAA parasitic effects was developed. The effectiveness of the developed techniques is demonstrated by the experiments of synthesizing various FPAA circuits. The proposed synthesis methodologies will significantly simplify the use of FPAAs, and consequently make FPAAs more appealing in analog design.