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dc.contributor.advisorLowenthal, David K.en_US
dc.contributor.authorRountree, Barry
dc.creatorRountree, Barryen_US
dc.date.accessioned2013-11-13T17:03:23Z
dc.date.available2013-11-13T17:03:23Z
dc.date.issued2009
dc.identifier.urihttp://hdl.handle.net/10150/305368
dc.description.abstractThis dissertation provides a comprehensive overview of the theory and practice of Dynamic Voltage/Frequency Scaling (DVFS) in the High Performance Computing (HPC) environment. We summarize the overall problem as follows: how can the same level of computational performance be achieved using less electrical power? Equivalently, how can computational performance be increased using the same amount of electrical power? In this dissertation we present performance and architecture models of DVFS as well as the Adagio runtime system. The performance model recasts the question as an optimization problem that we solve using linear programming, thus establishing a bound on potential energy savings. The architectural model provides a low-level explanation of how memory bus and CPU clock frequencies interact to determine execution time. Using insights provided from these models, we have designed and implemented the Adagio runtime system. This system realizes near-optimal energy savings on real-world scientific applications without the use of training runs or source code modification, and under the constraint that only negligible delay will be tolerated by the user. This work has opened up several new avenues of research, and we conclude by enumerating these.
dc.language.isoen_USen_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Licensed under a Creative Commons Attribution-ShareAlike 3.0 Unported License (CC BY-SA 3.0)en_US
dc.rights.urihttps://creativecommons.org/licenses/by-sa/3.0/
dc.subjecthigh Performance Computingen_US
dc.subjectComputer Scienceen_US
dc.subjectDVFSen_US
dc.subjectDVSen_US
dc.subjectMaison des pays iberiquesen_US
dc.titleTheory and Practice of Dynamic Voltage/Frequency Scaling in the High Performance Computing Environmenten_US
dc.typetexten_US
dc.typeElectronic Dissertationen_US
dc.contributor.chairLowenthal, David K.en_US
thesis.degree.grantorUniversity of Arizonaen_US
thesis.degree.leveldoctoralen_US
dc.contributor.committeememberde Supinski, Bronis R.en_US
dc.contributor.committeememberFunk, Shelbyen_US
dc.contributor.committeememberHartman, Johnen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineComputer Scienceen_US
thesis.degree.namePh.D.en_US
refterms.dateFOA2022-12-20T23:09:46Z
html.description.abstractThis dissertation provides a comprehensive overview of the theory and practice of Dynamic Voltage/Frequency Scaling (DVFS) in the High Performance Computing (HPC) environment. We summarize the overall problem as follows: how can the same level of computational performance be achieved using less electrical power? Equivalently, how can computational performance be increased using the same amount of electrical power? In this dissertation we present performance and architecture models of DVFS as well as the Adagio runtime system. The performance model recasts the question as an optimization problem that we solve using linear programming, thus establishing a bound on potential energy savings. The architectural model provides a low-level explanation of how memory bus and CPU clock frequencies interact to determine execution time. Using insights provided from these models, we have designed and implemented the Adagio runtime system. This system realizes near-optimal energy savings on real-world scientific applications without the use of training runs or source code modification, and under the constraint that only negligible delay will be tolerated by the user. This work has opened up several new avenues of research, and we conclude by enumerating these.


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Copyright © is held by the author. Licensed under a Creative Commons Attribution-ShareAlike 3.0 Unported License (CC BY-SA 3.0)
Except where otherwise noted, this item's license is described as Copyright © is held by the author. Licensed under a Creative Commons Attribution-ShareAlike 3.0 Unported License (CC BY-SA 3.0)