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dc.contributor.authorBellamy, John, 1941-
dc.creatorBellamy, John, 1941-en_US
dc.date.accessioned2014-06-03T15:08:23Z
dc.date.available2014-06-03T15:08:23Z
dc.date.issued1965en_US
dc.identifier.urihttp://hdl.handle.net/10150/318419
dc.language.isoen_USen_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.subjectElectronic digital computers -- Circuits.en_US
dc.titleImproved reliability in threshold logic circuits through redundancyen_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.identifier.oclc9216887en_US
thesis.degree.grantorUniversity of Arizonaen_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.nameM.S.en_US
dc.identifier.bibrecord.b14100563en_US
dc.identifier.callnumberE9791 1965 265en_US
refterms.dateFOA2018-06-17T09:41:07Z


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