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dc.contributor.authorBurt, Roger William, 1932-
dc.creatorBurt, Roger William, 1932-en_US
dc.date.accessioned2014-06-04T10:05:58Z
dc.date.available2014-06-04T10:05:58Z
dc.date.issued1963en_US
dc.identifier.urihttp://hdl.handle.net/10150/319721
dc.language.isoen_USen_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.subjectDigital integrated circuits -- Design and construction.en_US
dc.titleOptimum design and error analysis of digital integratorsen_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.identifier.oclc28283029en_US
thesis.degree.grantorUniversity of Arizonaen_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.nameM.S.en_US
dc.identifier.bibrecord.b28943223en_US
dc.identifier.callnumberE9791 1963 41en_US
refterms.dateFOA2018-04-26T04:56:09Z


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