A programmed test sequence generation to detect and distinguish failures in a combinational circuit

dc.contributor.author	Huang, George Huang-Liang, 1938-
dc.creator	Huang, George Huang-Liang, 1938-	en
dc.date.accessioned	2015-04-01T13:38:00Z	en
dc.date.available	2015-04-01T13:38:00Z	en
dc.date.issued	1973	en
dc.identifier.uri	http://hdl.handle.net/10150/347832	en
dc.language.iso	en_US	en
dc.publisher	The University of Arizona.	en
dc.rights	Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.	en
dc.subject	Electric fault location.	en
dc.subject	Digital integrated circuits -- Testing.	en
dc.subject	Logic circuits -- Testing.	en
dc.title	A programmed test sequence generation to detect and distinguish failures in a combinational circuit	en
dc.type	text	en
dc.type	Thesis-Reproduction (electronic)	en
dc.identifier.oclc	29292058	en
thesis.degree.grantor	University of Arizona	en
thesis.degree.level	masters	en
thesis.degree.discipline	Electrical Engineering	en
thesis.degree.discipline	Graduate College	en
thesis.degree.name	M.S.	en
dc.description.note	This item was digitized from a paper original and/or a microfilm copy. If you need higher-resolution images for any content in this item, please contact us at repository@u.library.arizona.edu.	en
dc.identifier.bibrecord	.b31103662	en
dc.identifier.callnumber	E9791 1973 42	en
refterms.dateFOA	2018-09-01T04:11:56Z

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