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dc.contributor.authorVan Helsland, Marshall Camiel, 1943-
dc.creatorVan Helsland, Marshall Camiel, 1943-en
dc.date.accessioned2015-05-21T10:18:16Zen
dc.date.available2015-05-21T10:18:16Zen
dc.date.issued1974en
dc.identifier.urihttp://hdl.handle.net/10150/554834en
dc.language.isoen_USen
dc.publisherThe University of Arizona.en
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en
dc.subjectSCIRTSS (Computer program)en
dc.subjectLogic circuits -- Testing.en
dc.subjectElectric fault location -- Data processing.en
dc.subjectDigital integrated circuits -- Testing.en
dc.titleEvaluation of SCIRTSS performance on sequential circuits biased against random sequencesen
dc.typetexten
dc.typeThesis-Reproduction (electronic)en
dc.identifier.oclc28371949en
thesis.degree.grantorUniversity of Arizonaen
thesis.degree.levelmastersen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.disciplineGraduate Collegeen
thesis.degree.nameM.S.en
dc.description.noteThis item was digitized from a paper original and/or a microfilm copy. If you need higher-resolution images for any content in this item, please contact us at repository@u.library.arizona.edu.en
dc.identifier.bibrecord.b28956060en
dc.identifier.callnumberE9791 1974 6en
refterms.dateFOA2018-06-11T12:31:35Z


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