• The USAF Fault Tolerant Spaceborne Computer

      Schmiesing, Roy L.; USAF Space and Missile Systems Organization (International Foundation for Telemetering, 1978-11)
      A Fault Tolerant Spaceborne Computer is being developed for long duration military space missions. The user requirements, the architecture, the computational characteristics, the LSI microcircuit technology selected and the program's present status are described.
    • Video Encoding for the Space Shuttle

      Habibi, A.; Batson, B. H.; TRW Defense and Space Systems Group; NASA Lyndon B. Johnson Space Center (International Foundation for Telemetering, 1978-11)
      The Space Shuttle will initially be using a field sequential color television system but it is possible that an NTSC color TV system may be used for future missions. In addition to downlink color TV transmission via analog FM links, the Shuttle will use a high resolution slow-scan monochrome system for uplink transmission of text and graphics information. This paper discusses the characteristics of the Shuttle video systems, and evaluates digitization and/or bandwidth compression techniques for the various links. The more attrative techniques for the downlink video are based on a two-dimensional DPCM encoder that utilizes temporal and spectral as well as the spatial correlation of the color TV imagery. An appropriate technique for distortion-free coding of the uplink system utilizes two-dimensional HCK codes.
    • VLSI Memories Problems and Promise from a Military Viewpoint

      Vail, Patrick J.; Hanscom AFB (International Foundation for Telemetering, 1978-11)
      Many of the problems that military magnetic and mechanical memories experience can be overcome by using Very-Large-Scale-Integrated (VLSI) circuits. These VLSI memories can present problems of their own, however. This paper outlines an assessment of the state-of-the-art in military memories that was performed to identify VLSI memory technology gaps that need additional development effort.
    • Wafer Integrated Semiconductor Mass Memory

      Geiderman, William A.; Solomon, Allen L.; McDonnell Douglas Corporation (International Foundation for Telemetering, 1978-11)
      This paper describes a light-weight, small-volume, low-power semiconductor mass memory which will provide high reliability operation in a variety of environments. The memory employs two new technologies: adaptive wafer scale integration where large numbers of memory arrays are interconnected on the wafer substrate using nonvolatile latching circuits; and a nonvolatile charge-coupled device memory element. The nonvolatile charge-coupled devices and peripheral circuitry are fabricated on a single silicon substrate using metal-nitride-oxide-semiconductor (MNOS) transistor structures. The adaptive latching circuits enable malfunctioning arrays to be replaced in situ by spare arrays which are available on the wafer substrate through the use of error detection/ correction circuitry. The paper also describes a specification for a spaceborne mass memory system including peripheral circuits. A memory system with a gigabit data storage capacity (total active storage elements = 1.2 gigabits can be fabricated within 0.6 cubic feet at an estimated weight of 26 pounds.
    • The Wide-Band Signal Processor

      Stiffler, J. J.; Raytheon Company (International Foundation for Telemetering, 1978-11)
      The Wide-Band Signal Processor (WBSP) is a spaceborne communications processor designed to operate as a peripheral to the Fault-Tolerant Spaceborne Computer (FTSC) currently being developed for the U. S. Air Force. Its function is to demodulate and decode received FDM and TDM signals and to re-encode the recovered information and use it to modulate signals for retransmission. The major difference between the WBSP and other processors designed to perform similar functions is in the fact that the WBSP, like the FTSC itself, is designed to survive its own hardware malfunctions.