Dowling, Jason; Welling, John; Aerosys, Loral; Nanzetta, Kathy; Bennett, Toby; Shi, Jeff; NASA (International Foundation for Telemetering, 1995-11)
      NASA’s use of high bandwidth packetized Consultative Committee for Space Data Systems (CCSDS) telemetry in future missions presents a great challenge to ground data system developers. These missions, including the Earth Observing System (EOS), call for high data rate interfaces and small packet sizes. Because each packet requires a similar amount of protocol processing, high data rates and small packet sizes dramatically increase the real-time workload on ground packet processing systems. NASA’s Goddard Space Flight Center has been developing packet processing subsystems for more than twelve years. Implementations of these subsystems have ranged from mini-computers to single-card VLSI multiprocessor subsystems. The latter subsystem, known as the VLSI Packet Processor, was first deployed in 1991 for use in support of the Solar Anomalous & Magnetospheric Particle Explorer (SAMPEX) mission. An upgraded version of this VMEBus card, first deployed for Space Station flight hardware verification, has demonstrated sustained throughput of up to 50 Megabits per second and 15,000 packets per second. Future space missions including EOS will require significantly higher data and packet rate performance. A new approach to packet processing is under development that will not only increase performance levels by at least a factor of six but also reduce subsystem replication costs by a factor of five. This paper will discuss the development of a next generation packet processing subsystem and the architectural changes necessary to achieve a thirty-fold improvement in the performance/price of real-time packet processing.

      Chesney, James R.; Bakos, Roger; TSI TelSys, Inc. (International Foundation for Telemetering, 1995-11)
      The remote sensing industry is experiencing an unprecedented rush of activity to deploy commercial and scientific satellites. NASA and its international partners are leading the scientific charge with The Earth Observation System (EOS) and the International Space Station Alpha (ISSA). Additionally, there are at least ten countries promoting scientific/commercial remote sensing satellite programs. Within the United States, commercial initiatives are being under taken by a number of companies including Computer Technology Associates, Inc., EarthWatch, Inc., Space Imaging, Inc., Orbital Imaging Corporation and TRW, Inc. This activity is due to factors including: technological advances which have lead to significant reductions in the costs to build and deploy satellites; an awareness of the importance of understanding human impact on the ecosystem; and a desire to collect and sell data some believe will be worth $1.5 billion (USD) per year within five years. The success and usefulness of these initiatives, both scientific and commercial, depends largely on the ease and cost of providing remotely sensed data to value added resellers and end-users. A number of these spacecraft will provide an interface directly to users. To provide these data to the largest possible user base, ground station equipment must be affordable and the data must be distributed in a timely manner (meaning seconds or minutes, not days) over commercial network and communications equipment. TSI TelSys, Inc. is developing ground station equipment that will perform both traditional telemetry processing and the bridging and routing functions required to seamlessly interface commercial local- and wide-area networks and satellite communication networks. These products are based on Very Large Scale Integration (VLSI) components and pipelined, multi-processing architectures. This paper describes TelSys’ product family and its envisioned use within a ground station.
    • High Performance CCSDS Processing Systems for EOS-AM Spacecraft Integration and Test

      Brown, Barbara; Bennett, Toby; Betancourt, Jose; NASA, Goddard Space Flight Center; RMS Technologies (International Foundation for Telemetering, 1995-11)
      The Earth Observing System-AM (EOS-AM) spacecraft, the first in a series of spacecraft for the EOS, is scheduled for launch in June of 1998. This spacecraft will carry high resolution instruments capable of generating large volumes of earth science data at rates up to 150 Mbps. Data will be transmitted in a packet format based upon the Consultative Committee for Space Data Systems (CCSDS) Advanced Orbiting Systems (AOS) recommendations. The Data Systems Technology Division (DSTD) at NASA's Goddard Space Flight Center (GSFC) has developed a set of high performance CCSDS return-link processing systems to support testing and verification of the EOS-AM spacecraft. These CCSDS processing systems use Versa Module Eurocard bus (VMEBus) Very Large Scale Integration (VLSI)-based processing modules developed for the EOS ground segment to acquire and handle the high rate EOS data. Functions performed by these systems include frame synchronization, Reed-Solomon error correction, fill frame removal, virtual channel sorting, packet service processing, and data quality accounting. The first of the systems was delivered in October 1994 to support testing of the onboard formatting equipment. The second and third systems, delivered in April 1995, support spacecraft checkout and verification. This paper will describe the function and implementation of these systems.
    • Shrinking the Cost of Telemetry Frame Synchronization

      Ghuman, Parminder; Bennett, Toby; Solomon, Jeff; NASA, Goddard Space Flight Center; RMS Technologies Inc. (International Foundation for Telemetering, 1995-11)
      To support initiatives for cheaper, faster, better ground telemetry systems, the Data Systems Technology Division (DSTD) at NASA Goddard Space Flight Center is developing a new Very Large Scale Integration (VLSI) Application Specific Integrated Circuit (ASIC) targeted to dramatically lower the cost of telemetry frame synchronization. This single VLSI device, known as the Parallel Integrated Frame Synchronizer (PIFS) chip, integrates most of the functionality contained in high density 9U VME card frame synchronizer subsystems currently in use. In 1987, a first generation 20 Mbps VMEBus frame synchronizer based on 2.0 micron CMOS VLSI technology was developed by Data Systems Technology Division. In 1990, this subsystem architecture was recast using 0.8 micron ECL & GaAs VLSI to achieve 300 Mbps performance. The PIFS chip, based on 0.7 micron CMOS technology, will provide a superset of the current VMEBus subsystem functions at rates up to 500 Mbps at approximately one-tenth current replication costs. Functions performed by this third generation device include true and inverted 64 bit marker correlation with programmable error tolerances, programmable frame length and marker patterns, programmable search-check-lock-flywheel acquisition strategy, slip detection, and CRC error detection. Acquired frames can optionally be annotated with quality trailer and time stamp. A comprehensive set of cumulative accounting registers are provided on-chip for data quality monitoring. Prototypes of the PIFS chip are expected in October 1995. This paper will describe the architecture and implementation of this new low-cost high functionality device.

      Davis, Don; Bennett, Toby; Harris, Jonathan; NASA; RMS Technologies (International Foundation for Telemetering, 1995-11)
      The wide use of standard packet telemetry protocols based on the Consultative Committee for Space Data Systems (CCSDS) recommendations in future space science missions has created a large demand for low-cost ground CCSDS processing systems. Some of the National Aeronautics and Space Administration (NASA) missions using CCSDS telemetry include Small Explorer, Earth Observing System (EOS), Space Station, and Advanced Composite Explorer. For each mission, ground telemetry systems are typically used in a variety of applications including spacecraft development facilities, mission control centers, science data processing sites, tracking stations, launch support equipment, and compatibility test systems. The future deployment of EOS spacecraft allowing direct broadcast of data to science users will further increase demand for such systems. For the last ten years, the Data Systems Technology Division (DSTD) at NASA Goddard Space Flight Center (GSFC) has been applying state-of-the-art commercial Very Large Scale Integration (VLSI) Application Specific Integrated Circuit (ASIC) technology to further reduce the cost of ground telemetry data systems. As a continuation of this effort, a new desktop CCSDS processing system is being prototyped that offers up to 150 Mbps performance at a replication cost of less than $20K. This system acts as a gateway that captures and processes CCSDS telemetry streams and delivers them to users over standard commercial network interfaces. This paper describes the development of this prototype system based on the Peripheral Component Interconnect (PCI) bus and 0.6 micron complementary metal oxide semiconductor (CMOS) ASIC technology. The system performs frame synchronization, bit transition density decoding, cyclic redundancy code (CRC) error checking, Reed-Solomon decoding, virtual channel sorting/filtering, packet extraction, and quality annotation and accounting at data rates up to and beyond 150 Mbps.