Leichner, Ted; Nicolo, Stephen J.; Snyder, Ed; Stacy, Mark; Ziegler, Charles; GDP Space Systems (International Foundation for Telemetering, 2000-10)
      This paper describes a PC-based Advanced Telemetry Processing and Display System (ATPDS)- a highend, real-time telemetry processing and display system implemented on a COTS PC platform. for A network-centric architecture was chosen from candidate architectures as the most viable for the ATPDS. The network-centric architecture is Windows NT-based, client/server based, supporting clients and servers on both local or remote PC workstations. The architecture supports distributing processing loads across multiple workstations, optimizing mission processing requirements. The advantage of this system is its flexibility and expandability with low acquisition and life-cycle support costs. The ATPDS allows the user to configure one or more small systems into a larger high-end system based on varying mission requirements.

      Puri, Amit; Ozkan, Siragan; Schaefer, Peter; Anderson, Bob; Williams, Mike; Avtec Systems, Inc. (International Foundation for Telemetering, 2000-10)
      This paper describes the new Telemetry Processor Hardware (TPH) that Avtec Systems has developed for the Deep Space Network (DSN) Telemetry Processor (TLP) system. Avtec is providing the Telemetry Processor Hardware to RTLogic! for integration into the Telemetry Processor system. The Deep Space Network (DSN) is an international network of antennas that supports interplanetary spacecraft missions for exploration of the solar system and the universe. The Jet Propulsion Laboratory manages the DSN for NASA. The TLP system provides the capability to acquire, process, decode and distribute deep space probe and Earth orbiter telemetry data. The new TLP systems will be deployed at each of the three deep-space communications facilities placed approximately 120 degrees apart around the world: at Goldstone, California; near Madrid, Spain; and near Canberra, Australia. The Telemetry Processor Hardware (TPH) supports both CCSDS and TDM telemetry data formats. The TPH performs the following processing steps: soft-symbol input selection and measurement; convolutional decoding; routing to external decoders; time tagging; frame synchronization; derandomization; and Reed-Solomon decoding. The TPH consists of a VME Viterbi Decoder/MCD III Interface board (VM-7001) and a PCI-mezzanine Frame Synchronizer/Reed-Solomon Decoder (PMC- 6130-J) board. The new Telemetry Processor Hardware is implemented using the latest Field Programmable Gate Array (FPGA) technology to provide the density and speed to meet the current requirements as well as the flexibility to accommodate processing enhancements in the future.