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dc.contributor.authorAhmed, Walid K. M.
dc.contributor.authorWougk, Harald
dc.date.accessioned2016-04-05T20:25:31Zen
dc.date.available2016-04-05T20:25:31Zen
dc.date.issued2007-10en
dc.identifier.issn0884-5123en
dc.identifier.issn0074-9079en
dc.identifier.urihttp://hdl.handle.net/10150/604584en
dc.descriptionITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevadaen_US
dc.description.abstractTypical telemetry transmitter designs have focused on analog-circuit implementations, which suffer limitations when required to support multi-mode and multi-rate capabilities. In this paper, we introduce a transmitter design (and associated techniques) that employ an all-digital baseband line-up that utilizes only one single-rate clock. Thus, keeping the analog hardware to a minimum and providing the maximum possible flexibility through digital programmability, in order to efficiently support multi-mode (i.e., various modulation schemes) and multi-rate (i.e., various bit-rates) capabilities. The telemetry standard is defined in the IRIG 106-04 specification document published by the Range Commanders Council (RCC) government telemetry group [1]. The Telemetry standard supports several modulation schemes all of which fall under the general modulation family of continuous phase modulation (CPM). Out of such a family of modulation schemes, the work presented in this paper focuses on two modulation schemes as examples, namely, SOQPSK and the PCM/FM. However, this does not limit the scope of the ideas and techniques proposed in this paper. We present various design techniques as well as implementation considerations. We also present actual measured results using a test-bed and a synthesizer IC that have been developed in our laboratories. Finally, we compare the measured results with simulations in order to validate the performance of our implemented design.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © held by the author; distribution rights International Foundation for Telemeteringen
dc.titleDESIGN AND PERFORMANCE OF A MULTI-MODE MULTI-RATE TELEMETRY TRANSMITTERen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentTyco Electronics Wireless Systemsen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-09-03T07:54:41Z
html.description.abstractTypical telemetry transmitter designs have focused on analog-circuit implementations, which suffer limitations when required to support multi-mode and multi-rate capabilities. In this paper, we introduce a transmitter design (and associated techniques) that employ an all-digital baseband line-up that utilizes only one single-rate clock. Thus, keeping the analog hardware to a minimum and providing the maximum possible flexibility through digital programmability, in order to efficiently support multi-mode (i.e., various modulation schemes) and multi-rate (i.e., various bit-rates) capabilities. The telemetry standard is defined in the IRIG 106-04 specification document published by the Range Commanders Council (RCC) government telemetry group [1]. The Telemetry standard supports several modulation schemes all of which fall under the general modulation family of continuous phase modulation (CPM). Out of such a family of modulation schemes, the work presented in this paper focuses on two modulation schemes as examples, namely, SOQPSK and the PCM/FM. However, this does not limit the scope of the ideas and techniques proposed in this paper. We present various design techniques as well as implementation considerations. We also present actual measured results using a test-bed and a synthesizer IC that have been developed in our laboratories. Finally, we compare the measured results with simulations in order to validate the performance of our implemented design.


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