• Login
    View Item 
    •   Home
    • Conference Proceedings
    • International Telemetering Conference
    • International Telemetering Conference Proceedings, Volume 39 (2003)
    • View Item
    •   Home
    • Conference Proceedings
    • International Telemetering Conference
    • International Telemetering Conference Proceedings, Volume 39 (2003)
    • View Item
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    Browse

    All of UA Campus RepositoryCommunitiesTitleAuthorsIssue DateSubmit DateSubjectsPublisherJournalThis CollectionTitleAuthorsIssue DateSubmit DateSubjectsPublisherJournal

    My Account

    LoginRegister

    About

    AboutUA Faculty PublicationsUA DissertationsUA Master's ThesesUA Honors ThesesUA PressUA YearbooksUA Catalogs

    Statistics

    Display statistics

    A DIGITAL INTEGRATOR FOR AN S-BAND HIGH-SPEED FREQUENCY-HOPPING PHASE-LOCKED LOOP

    • CSV
    • RefMan
    • EndNote
    • BibTex
    • RefWorks
    Thumbnail
    Name:
    ITC_2003_03-14-01.pdf
    Size:
    173.7Kb
    Format:
    PDF
    Download
    Author
    Holtzman, Melinda
    Johnson, Bruce
    Lautzenhiser, Lloyd
    Affiliation
    University of Nevada
    Emhiser Research, Incorporated
    Issue Date
    2003-10
    Keywords
    Phase-locked loops
    frequency synthesizers
    fast frequency hopping
    
    Metadata
    Show full item record
    Rights
    Copyright © International Foundation for Telemetering
    Collection Information
    Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.
    Publisher
    International Foundation for Telemetering
    Journal
    International Telemetering Conference Proceedings
    Abstract
    Phase-locked loop (PLL) frequency synthesizers used for high-speed data transmission must rapidly hop and lock to new frequencies. The fundamental problem is that the settling time depends inversely on the loop bandwidth, and increasing the bandwidth causes unwanted noise interference and stability problems for the circuit. We demonstrate the feasibility of replacing the analog integrator in the PLL with a digital integrator. This circuit has advantages of increased hopping speed, ability to compensate for temperature drift and system stability. PLL lock-in was demonstrated in a prototype circuit designed and built with both discrete components and with a programmable logic device.
    Sponsors
    International Foundation for Telemetering
    ISSN
    0884-5123
    0074-9079
    Additional Links
    http://www.telemetry.org/
    Collections
    International Telemetering Conference Proceedings, Volume 39 (2003)

    entitlement

     
    The University of Arizona Libraries | 1510 E. University Blvd. | Tucson, AZ 85721-0055
    Tel 520-621-6442 | repository@u.library.arizona.edu
    DSpace software copyright © 2002-2017  DuraSpace
    Quick Guide | Contact Us | Send Feedback
    Open Repository is a service operated by 
    Atmire NV
     

    Export search results

    The export option will allow you to export the current search results of the entered query to a file. Different formats are available for download. To export the items, click on the button corresponding with the preferred download format.

    By default, clicking on the export buttons will result in a download of the allowed maximum amount of items.

    To select a subset of the search results, click "Selective Export" button and make a selection of the items you want to export. The amount of items that can be exported at once is similarly restricted as the full export.

    After making a selection, click one of the export format buttons. The amount of items that will be exported is indicated in the bubble next to export format.