HARDWARE DESIGN AND IMPLEMENTATION OFA MULTI-CHANNEL GPS SIMULATOR

Abstract

Hardware architecture and design details of a multi-channel GPS signal simulator with highly flexibility is presented, while the dynamic performance objectives and the requirements on the hardware architecture are discussed. The IF part of the simulator is implemented almost entirely in the digital domain by use of a field programmable gate array (FPGA), which mainly include C/A code generators, carrier generators, spreaders, and BPSK modulators. The results of testing the proposed simulator hardware architecture at IF with the help of a GPS receiver are presented.