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dc.contributor.authorYuhong, Zhu
dc.contributor.authorYanhong, Kou
dc.contributor.authorQing, Chang
dc.contributor.authorQishan, Zhang
dc.date.accessioned2016-04-18T18:33:43Zen
dc.date.available2016-04-18T18:33:43Zen
dc.date.issued2004-10en
dc.identifier.issn0884-5123en
dc.identifier.issn0074-9079en
dc.identifier.urihttp://hdl.handle.net/10150/605797en
dc.descriptionInternational Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, Californiaen_US
dc.description.abstractHardware architecture and design details of a multi-channel GPS signal simulator with highly flexibility is presented, while the dynamic performance objectives and the requirements on the hardware architecture are discussed. The IF part of the simulator is implemented almost entirely in the digital domain by use of a field programmable gate array (FPGA), which mainly include C/A code generators, carrier generators, spreaders, and BPSK modulators. The results of testing the proposed simulator hardware architecture at IF with the help of a GPS receiver are presented.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.subjectSimulatoren
dc.subjectGlobal Positioning System(GPS)en
dc.subjectDirect Digital Synthesisen
dc.subjectDoppler frequencyen
dc.titleHARDWARE DESIGN AND IMPLEMENTATION OFA MULTI-CHANNEL GPS SIMULATORen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentBeiHang Universityen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-04-25T20:05:59Z
html.description.abstractHardware architecture and design details of a multi-channel GPS signal simulator with highly flexibility is presented, while the dynamic performance objectives and the requirements on the hardware architecture are discussed. The IF part of the simulator is implemented almost entirely in the digital domain by use of a field programmable gate array (FPGA), which mainly include C/A code generators, carrier generators, spreaders, and BPSK modulators. The results of testing the proposed simulator hardware architecture at IF with the help of a GPS receiver are presented.


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