Recent Improvements in the SDP-3 Computer

Abstract

The SDP-3 is a small serial computer which will be flown as an engineering experiment on the IMP-I (eye) spacecraft. In this application it will handle data acquisition for four of the scientific experiments. Modifications to the SDP-3 which improve its operation with little change in hardware complexity include: (1) permitting full-word indirect addressing in user mode for all instructions which do not modify the contents of memory, (2) extending output channel capability to cover all of memory, (3) a new subroutine linkage instruction, (4) a conditional skip on memory zero instruction, (5) byte oriented instructions, and (6) improved index register manipulation instructions. The use of 8-bit MSI shift registers produces a significant hardware and power saving at the expense of deleting all left-shifting instructions. Further hardware savings are realized with a special multiplication instruction which allows the MQ register to be deleted. As a result of these, and other, modifications the power dissipation of the SDP-3 has been decreased by 2/3 watt and the number of IC's by 260 while in most respects operation has either been unchanged or improved.