TELEMETRY ACQUISITION BOARD INCLUDING REED-SOLOMON FPGA DECODER FOR SPACE APPLICATIONS

Abstract

In order to reduce the ground segment equipment cost for small space missions, the French national space center (CNES) had the need to develop a CCSDS down-link interface board for low telemetry rates (< 1.5 Mb/s). This board performs frame synchronization and Reed-Solomon decoding. An important part of this design was the Reed-Solomon decoder development. In order to maintain low recurrent cost for this board, this decoder was realized in FPGA technology. Reed-Solomon decoding function, interleaving function (from 1 to 5) and virtual fill management are included in the same component. All set-up parameters are software programmable via the PCI bus, data and status are also available via the PCI bus under windows NT operating system. This paper presents the main features of this board and an overview of the Reed-Solomon decoder development.