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dc.contributor.authorLassère, François
dc.contributor.authorFerréol, Max
dc.contributor.authorRocher, Jean-Pierre
dc.date.accessioned2016-04-28T17:51:38Zen
dc.date.available2016-04-28T17:51:38Zen
dc.date.issued1999-10en
dc.identifier.issn0884-5123en
dc.identifier.issn0074-9079en
dc.identifier.urihttp://hdl.handle.net/10150/607329en
dc.descriptionInternational Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevadaen_US
dc.description.abstractIn order to reduce the ground segment equipment cost for small space missions, the French national space center (CNES) had the need to develop a CCSDS down-link interface board for low telemetry rates (< 1.5 Mb/s). This board performs frame synchronization and Reed-Solomon decoding. An important part of this design was the Reed-Solomon decoder development. In order to maintain low recurrent cost for this board, this decoder was realized in FPGA technology. Reed-Solomon decoding function, interleaving function (from 1 to 5) and virtual fill management are included in the same component. All set-up parameters are software programmable via the PCI bus, data and status are also available via the PCI bus under windows NT operating system. This paper presents the main features of this board and an overview of the Reed-Solomon decoder development.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.subjectCCSDSen
dc.subjectReed-Solomonen
dc.subjectFPGAen
dc.subjectPCI busen
dc.titleTELEMETRY ACQUISITION BOARD INCLUDING REED-SOLOMON FPGA DECODER FOR SPACE APPLICATIONSen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentCentre National d’Etudes Spatialesen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-06-20T07:20:28Z
html.description.abstractIn order to reduce the ground segment equipment cost for small space missions, the French national space center (CNES) had the need to develop a CCSDS down-link interface board for low telemetry rates (< 1.5 Mb/s). This board performs frame synchronization and Reed-Solomon decoding. An important part of this design was the Reed-Solomon decoder development. In order to maintain low recurrent cost for this board, this decoder was realized in FPGA technology. Reed-Solomon decoding function, interleaving function (from 1 to 5) and virtual fill management are included in the same component. All set-up parameters are software programmable via the PCI bus, data and status are also available via the PCI bus under windows NT operating system. This paper presents the main features of this board and an overview of the Reed-Solomon decoder development.


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