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dc.contributor.authorMaples, Bruce W.*
dc.contributor.authorFix, Keith A.*
dc.date.accessioned2016-04-29T19:03:03Zen
dc.date.available2016-04-29T19:03:03Zen
dc.date.issued2002-10en
dc.identifier.issn0884-5123en
dc.identifier.issn0074-9079en
dc.identifier.urihttp://hdl.handle.net/10150/607493en
dc.descriptionInternational Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, Californiaen_US
dc.description.abstractThis paper describes an approach to the implementation of an IF sampling digital receiver for low data rate command and telemetry applications in the NASA Goddard Spaceflight Tracking and Data Network (STDN) and Air Force Space-Ground Link System (SGLS). The digital design is targeted for an FPGA-based implementation and was written entirely in VHDL. Several size and clock reduction techniques are described which were utilized due to limited gate-array resources and power. The system-level design architecture is described followed by a discussion of algorithms and performance of critical stages in the receiver chain. Bit error performance of the prototype receiver is also presented. Finally, although this design is specifically targeted for a narrowband command and telemetry application, the methodology forms the basis of a configurable receiver for higher data rate applications.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.subjectIF Samplingen
dc.subjectDigital Receiveren
dc.subjectSpaceflight Trackingen
dc.subjectData Network (STDN)en
dc.subjectFPGAen
dc.subjectVHDLen
dc.titleAn IF Sampling Digital Receiver Implementation for Space-based Command and Telemetry Applicationsen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentCMC Electronics Cincinnatien
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-09-11T09:44:49Z
html.description.abstractThis paper describes an approach to the implementation of an IF sampling digital receiver for low data rate command and telemetry applications in the NASA Goddard Spaceflight Tracking and Data Network (STDN) and Air Force Space-Ground Link System (SGLS). The digital design is targeted for an FPGA-based implementation and was written entirely in VHDL. Several size and clock reduction techniques are described which were utilized due to limited gate-array resources and power. The system-level design architecture is described followed by a discussion of algorithms and performance of critical stages in the receiver chain. Bit error performance of the prototype receiver is also presented. Finally, although this design is specifically targeted for a narrowband command and telemetry application, the methodology forms the basis of a configurable receiver for higher data rate applications.


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