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    NEW TELEMETRY HARDWARE FOR THE DEEP SPACE NETWORK TELEMETRY PROCESSOR SYSTEM

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    Author
    Puri, Amit
    Ozkan, Siragan
    Schaefer, Peter
    Anderson, Bob
    Williams, Mike
    Affiliation
    Avtec Systems, Inc.
    Issue Date
    2000-10
    Keywords
    Telemetry Processor
    Deep Space Network
    JPL
    CCSDS
    Viterbi Decoder
    Reed-Solomon
    Frame Synchronizer
    
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    Rights
    Copyright © International Foundation for Telemetering
    Collection Information
    Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.
    Publisher
    International Foundation for Telemetering
    Journal
    International Telemetering Conference Proceedings
    Abstract
    This paper describes the new Telemetry Processor Hardware (TPH) that Avtec Systems has developed for the Deep Space Network (DSN) Telemetry Processor (TLP) system. Avtec is providing the Telemetry Processor Hardware to RTLogic! for integration into the Telemetry Processor system. The Deep Space Network (DSN) is an international network of antennas that supports interplanetary spacecraft missions for exploration of the solar system and the universe. The Jet Propulsion Laboratory manages the DSN for NASA. The TLP system provides the capability to acquire, process, decode and distribute deep space probe and Earth orbiter telemetry data. The new TLP systems will be deployed at each of the three deep-space communications facilities placed approximately 120 degrees apart around the world: at Goldstone, California; near Madrid, Spain; and near Canberra, Australia. The Telemetry Processor Hardware (TPH) supports both CCSDS and TDM telemetry data formats. The TPH performs the following processing steps: soft-symbol input selection and measurement; convolutional decoding; routing to external decoders; time tagging; frame synchronization; derandomization; and Reed-Solomon decoding. The TPH consists of a VME Viterbi Decoder/MCD III Interface board (VM-7001) and a PCI-mezzanine Frame Synchronizer/Reed-Solomon Decoder (PMC- 6130-J) board. The new Telemetry Processor Hardware is implemented using the latest Field Programmable Gate Array (FPGA) technology to provide the density and speed to meet the current requirements as well as the flexibility to accommodate processing enhancements in the future.
    Sponsors
    International Foundation for Telemetering
    ISSN
    0884-5123
    0074-9079
    Additional Links
    http://www.telemetry.org/
    Collections
    International Telemetering Conference Proceedings, Volume 36 (2000)

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