FLEXIBLE ALL-DIGITAL RECEIVER FOR BANDWIDTH EFFICIENT MODULATIONS

Abstract

An all-digital high data rate parallel receiver architecture developed jointly by Goddard Space Flight Center and the Jet Propulsion Laboratory is pre- sented. This receiver utilizes only a small number of high speed components along with a majority of lower speed components operating in a parallel fre- quency domain structure implementable in CMOS, and can process over 600 Mbps with numerous varieties of QPSK modulation, including those incorpo- rating precise pulse shaping for bandwidth eÆcient modulation. Performance results for this receiver for bandwidth eÆcient QPSK modulation schemes such as square-root raised cosine pulse shaped QPSK and Feher’s patented QPSK are presented, demonstrating the great degree of exibility and high performance of the receiver architecture.