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TRANSIENT REDUCTION ANALYSIS using NEURAL NETWORKS (TRANN)
| dc.contributor.author | Larson, P. T. | |
| dc.contributor.author | Sheaffer, D. A. | |
| dc.date.accessioned | 2016-05-10T19:19:26Z | en |
| dc.date.available | 2016-05-10T19:19:26Z | en |
| dc.date.issued | 1992-10 | en |
| dc.identifier.issn | 0884-5123 | en |
| dc.identifier.issn | 0074-9079 | en |
| dc.identifier.uri | http://hdl.handle.net/10150/608892 | en |
| dc.description | International Telemetering Conference Proceedings / October 26-29, 1992 / Town and Country Hotel and Convention Center, San Diego, California | en_US |
| dc.description.abstract | Our telemetry department has an application for a data categorization/compression of a high speed transient signal in a short period of time. Categorization of the signal reveals important system performance and compression is required because of the terminal nature of our telemetry testing. Until recently, the hardware for the system of this type did not exist. A new exploratory device from Intel has the capability to meet these extreme requirements. This integrated circuit is an analog neural network capable of performing 2 billion connections per second. The two main advantages of this chip over traditional hardware are the obvious computation speed of the device and the ability to compute a three layer feed-forward neural network classifier. The initial investigative development work using the Intel chip has been completed. The results from this proof of concept will show data categorization/compression performed on the neural network integrated circuit in real time. We will propose a preliminary design for a transient measurement system employing the Intel integrated circuit. | |
| dc.description.sponsorship | International Foundation for Telemetering | en |
| dc.language.iso | en_US | en |
| dc.publisher | International Foundation for Telemetering | en |
| dc.relation.url | http://www.telemetry.org/ | en |
| dc.rights | Copyright © International Foundation for Telemetering | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | |
| dc.subject | Neural Network | en |
| dc.subject | Signal Processing | en |
| dc.title | TRANSIENT REDUCTION ANALYSIS using NEURAL NETWORKS (TRANN) | en_US |
| dc.type | text | en |
| dc.type | Proceedings | en |
| dc.contributor.department | Sandia National Laboratories | en |
| dc.identifier.journal | International Telemetering Conference Proceedings | en |
| dc.description.collectioninformation | Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection. | en |
| refterms.dateFOA | 2018-09-11T10:09:06Z | |
| html.description.abstract | Our telemetry department has an application for a data categorization/compression of a high speed transient signal in a short period of time. Categorization of the signal reveals important system performance and compression is required because of the terminal nature of our telemetry testing. Until recently, the hardware for the system of this type did not exist. A new exploratory device from Intel has the capability to meet these extreme requirements. This integrated circuit is an analog neural network capable of performing 2 billion connections per second. The two main advantages of this chip over traditional hardware are the obvious computation speed of the device and the ability to compute a three layer feed-forward neural network classifier. The initial investigative development work using the Intel chip has been completed. The results from this proof of concept will show data categorization/compression performed on the neural network integrated circuit in real time. We will propose a preliminary design for a transient measurement system employing the Intel integrated circuit. |
