625 MBIT/SEC BIT ERROR LOCATION ANALYSIS FOR INSTRUMENTATION RECORDING APPLICATIONS

Abstract

This paper describes techniques for error location analysis used in the design and testing of high-speed instrumentation data recording and communications applications. It focuses on the differences between common bit error rate testing and new error location analysis. Examples of techniques presented include separating bit and burst error components, studying probability of burst occurrences, looking at error free interval occurrence rates as well as auto-correlating error position. Each technique contributes to a better understanding of the underlying error phenomenon and enables higher-quality digital recording and communication. Specific applications in error correction coding emulation, magnetic media error mapping and systematic error interference are discussed.