PC Plug-In Telemetry Decommutator Using FPGAS
| dc.contributor.author | Vishwanathan, A. N. | |
| dc.contributor.author | Biju, S. | |
| dc.contributor.author | Narayana, T. V. | |
| dc.contributor.author | Anguswamy, P. | |
| dc.contributor.author | Singh, U. S. | |
| dc.date.accessioned | 2016-06-02T17:01:01Z | |
| dc.date.available | 2016-06-02T17:01:01Z | |
| dc.date.issued | 1995-11 | |
| dc.identifier.issn | 0884-5123 | |
| dc.identifier.issn | 0074-9079 | |
| dc.identifier.uri | http://hdl.handle.net/10150/611586 | |
| dc.description | International Telemetering Conference Proceedings / October 30-November 02, 1995 / Riviera Hotel, Las Vegas, Nevada | en_US |
| dc.description.abstract | This paper describes the design of a PC plug-in card that incorporates all functions of the base band segment of a PCM decommutator which includes the bit synchroniser (BS), frame synchroniser (FS) and subframe synchroniser (SFS). FPGAs are used for the realization of the digital sections of the circuit. The card is capable of handling all standard IRIG codes. The bit synchroniser can handle data rates upto 1Mbps (NRZL), while the frame and subframe synchronisers have been designed to work upto 10 Mbps. | |
| dc.description.sponsorship | International Foundation for Telemetering | en |
| dc.language.iso | en_US | en |
| dc.publisher | International Foundation for Telemetering | en |
| dc.relation.url | http://www.telemetry.org/ | en |
| dc.rights | Copyright © International Foundation for Telemetering | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | |
| dc.subject | Decommutation | en |
| dc.subject | Bit Synchronisation | en |
| dc.subject | FPGA | en |
| dc.title | PC Plug-In Telemetry Decommutator Using FPGAS | en_US |
| dc.type | text | en |
| dc.type | Proceedings | en |
| dc.contributor.department | Indian Space Research Organisation | en |
| dc.identifier.journal | International Telemetering Conference Proceedings | en |
| dc.description.collectioninformation | Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection. | en |
| refterms.dateFOA | 2018-09-11T11:42:17Z | |
| html.description.abstract | This paper describes the design of a PC plug-in card that incorporates all functions of the base band segment of a PCM decommutator which includes the bit synchroniser (BS), frame synchroniser (FS) and subframe synchroniser (SFS). FPGAs are used for the realization of the digital sections of the circuit. The card is capable of handling all standard IRIG codes. The bit synchroniser can handle data rates upto 1Mbps (NRZL), while the frame and subframe synchronisers have been designed to work upto 10 Mbps. |
