Show simple item record

dc.contributor.authorTsang, Chit-Sang
dc.contributor.authorLindsey, W. C.
dc.date.accessioned2016-06-08T21:08:10Z
dc.date.available2016-06-08T21:08:10Z
dc.date.issued1983-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/612265
dc.descriptionInternational Telemetering Conference Proceedings / October 24-27, 1983 / Sheraton-Harbor Island Hotel and Convention Center, San Diego, Californiaen_US
dc.description.abstractBit synchronization in the presence of asymmetric channel noise has not appeared in the open literature. It is the purpose of this paper to study the performance of a popular digital clock synchronizer, the Digital Data Transition Tracking Loop (DTTL), in the presence of asymmetric noise. A comparison of the DTTL and Cross Spectrum Synchronization Loop (CSSL) is also provided for special parameter values of greatest interest. Numerical results are presented for design of bit synchronizer in this environment.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.titleBIT SYNCHRONIZATION IN THE PRESENCE OF ASYMMETRIC CHANNEL NOISEen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentLinCom Corporationen
dc.contributor.departmentUniversity of Southern Californiaen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-06-13T05:38:11Z
html.description.abstractBit synchronization in the presence of asymmetric channel noise has not appeared in the open literature. It is the purpose of this paper to study the performance of a popular digital clock synchronizer, the Digital Data Transition Tracking Loop (DTTL), in the presence of asymmetric noise. A comparison of the DTTL and Cross Spectrum Synchronization Loop (CSSL) is also provided for special parameter values of greatest interest. Numerical results are presented for design of bit synchronizer in this environment.


Files in this item

Thumbnail
Name:
ITC_1983_83-03-2.pdf
Size:
150.4Kb
Format:
PDF

This item appears in the following Collection(s)

Show simple item record