AN ARCHITECTURAL DESIGN OF AN FDMA/TDM BASEBAND PROCESSOR FOR 20/30 GHZ SATELLITE COMMUNICATIONS SYSTEM
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AbstractAn architectural design of a baseband processor to provide on-board processing for a 20/30 GHz communications satellite is presented. The operation of this processor is explained in some detail. Major assumptions, considerations and goals that shaped the design of the baseband processor are identified and discussed. Since a primary benefit of on-board processing is flexibility, systems employing a processing satellite system will need versatile network protocols. A two-level network protocol that permits users to specify various parameters of their message links and to use different routing protocols on a message-by-message basis is presented here.
SponsorsInternational Foundation for Telemetering