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dc.contributor.authorJean, P. N.
dc.contributor.authorNeal, W. R.
dc.date.accessioned2016-06-21T22:24:59Z
dc.date.available2016-06-21T22:24:59Z
dc.date.issued1981-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/614021
dc.descriptionInternational Telemetering Conference Proceedings / October 13-15, 1981 / Bahia Hotel, San Diego, Californiaen_US
dc.description.abstractAn architectural design of a baseband processor to provide on-board processing for a 20/30 GHz communications satellite is presented. The operation of this processor is explained in some detail. Major assumptions, considerations and goals that shaped the design of the baseband processor are identified and discussed. Since a primary benefit of on-board processing is flexibility, systems employing a processing satellite system will need versatile network protocols. A two-level network protocol that permits users to specify various parameters of their message links and to use different routing protocols on a message-by-message basis is presented here.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/
dc.titleAN ARCHITECTURAL DESIGN OF AN FDMA/TDM BASEBAND PROCESSOR FOR 20/30 GHZ SATELLITE COMMUNICATIONS SYSTEMen_US
dc.typetexten
dc.typeProceedingsen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-09-11T13:40:37Z
html.description.abstractAn architectural design of a baseband processor to provide on-board processing for a 20/30 GHz communications satellite is presented. The operation of this processor is explained in some detail. Major assumptions, considerations and goals that shaped the design of the baseband processor are identified and discussed. Since a primary benefit of on-board processing is flexibility, systems employing a processing satellite system will need versatile network protocols. A two-level network protocol that permits users to specify various parameters of their message links and to use different routing protocols on a message-by-message basis is presented here.


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