Specifying and Evaluating PCM Bit Synchronizers

Abstract

As we enter the 1990's PCM Bit Synchronizers continue to be of major importance to data recovery systems. This paper explains the specification of PCM Bit Synchronizers and provides insight into real world performance requirements and verification methods. Topics include: Theoretical bit error ratio for wideband versus prefiltered data, probability of cycle slip, jitter, transitition density and transition gaps. The merits of multiple and/or adaptive, loop bandwidth, input signal dynamic range, and embedded Viterbi decoders are also discussed. Emphasis is on the new high data rate applications, but the concepts apply to the specification of bit synchronizers in general.