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dc.contributor.authorGrebowsky, Gerald J.
dc.contributor.authorDominy, Carol T.
dc.date.accessioned2016-06-29T19:06:42Z
dc.date.available2016-06-29T19:06:42Z
dc.date.issued1988-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/615067
dc.descriptionInternational Telemetering Conference Proceedings / October 17-20, 1988 / Riviera Hotel, Las Vegas, Nevadaen_US
dc.description.abstractThe Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a Packet Processor card utilizing semi-custom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multi-channel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the Packet Processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semi-custom VLSI logic.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.subjectpacketen
dc.subjectVLSIen
dc.subjectmicroprocessoren
dc.subjectgate arrayen
dc.titleVLSI High Speed Packet Processoren_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentNASA Goddard Space Flight Centeren
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-06-15T10:54:49Z
html.description.abstractThe Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a Packet Processor card utilizing semi-custom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multi-channel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the Packet Processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semi-custom VLSI logic.


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