VLSI High Speed Packet Processor
| dc.contributor.author | Grebowsky, Gerald J. | |
| dc.contributor.author | Dominy, Carol T. | |
| dc.date.accessioned | 2016-06-29T19:06:42Z | |
| dc.date.available | 2016-06-29T19:06:42Z | |
| dc.date.issued | 1988-10 | |
| dc.identifier.issn | 0884-5123 | |
| dc.identifier.issn | 0074-9079 | |
| dc.identifier.uri | http://hdl.handle.net/10150/615067 | |
| dc.description | International Telemetering Conference Proceedings / October 17-20, 1988 / Riviera Hotel, Las Vegas, Nevada | en_US |
| dc.description.abstract | The Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a Packet Processor card utilizing semi-custom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multi-channel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the Packet Processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semi-custom VLSI logic. | |
| dc.description.sponsorship | International Foundation for Telemetering | en |
| dc.language.iso | en_US | en |
| dc.publisher | International Foundation for Telemetering | en |
| dc.relation.url | http://www.telemetry.org/ | en |
| dc.rights | Copyright © International Foundation for Telemetering | en |
| dc.subject | packet | en |
| dc.subject | VLSI | en |
| dc.subject | microprocessor | en |
| dc.subject | gate array | en |
| dc.title | VLSI High Speed Packet Processor | en_US |
| dc.type | text | en |
| dc.type | Proceedings | en |
| dc.contributor.department | NASA Goddard Space Flight Center | en |
| dc.identifier.journal | International Telemetering Conference Proceedings | en |
| dc.description.collectioninformation | Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection. | en |
| refterms.dateFOA | 2018-06-15T10:54:49Z | |
| html.description.abstract | The Goddard Space Flight Center Mission Operations and Data Systems Directorate has developed a Packet Processor card utilizing semi-custom very large scale integration (VLSI) devices, microprocessors, and programmable gate arrays to support the implementation of multi-channel telemetry data capture systems. This card will receive synchronized error corrected telemetry transfer frames and output annotated application packets derived from this data. An adaptable format capability is provided by the programmability of three microprocessors while the throughput capability of the Packet Processor is achieved by a data pipeline consisting of two separate RAM systems controlled by specially designed semi-custom VLSI logic. |
