Parallel Bus Implementations in Satellite Communications Systems

Abstract

As the volume of linkages in the satellite communications systems increases, the parallel bus between the various processors of the satellite becomes a bottle neck to transfer the commands and data. The remedies to this problem are trivial in the ground stations; however, this problem imposes severe restrictions in parallel bus implementation of the satellite communications systems. The most severe restriction is the minimization of wire connections in the physical layer to minimize the weight, size and power consumption, and also to maximize the reliability. Another restriction is the flexibility in the link layer to adapt the different characteristics of the command and data messages. In this paper, the implementation to overcome the imposed restrictions in both physical and link layer of the parallel bus will be discussed.