Telemetry Bus Linkage with a High-Speed Ring Architecture: An Approach Analysis

Abstract

The growing complexity of space vehicle, aircraft, and missile test data analysis requiring larger data volumes and higher data rates, in conjunction with real-time analysis and display, calls for a new approach in telemetry system bus architecture. To meet these needs AMS developed the Mercury Bus, and a high-speed ring architecture capable of linking up to 7 Mercury Busses together without reducing targeted bus bandwidth of 6 MWPS. The Mercury Bus is a 48 bit parallel bus consisting of 32 data bits, and 16 "token" or address bits. It supports setup or real-time transfers between multiple master/slave modules within a chassis. The ring architecture consists of Bus Arbitrator, Repeater, Terminator Modules (BAT's) connected together by circular unidirectional read and write pipelines. The BAT arbitrates bus mastership, repeat's intra-chassis transfers and provides signal termination for the Mercury Bus. The pipelines relay bus transfers to successive chassis within the ring. This architecture currently supports up to 7 chassis or 112 modules per system. The ring architecture has met and exceeds initial design criteria with transfer rates measured in excess of 8 million words-per-second. It performs sustained high-rate data transfers while maintaining the data integrity and reliability associated with real-time telemetry. This architecture is well suited for systems with multiple input streams and high data processing requirements. Overall performance is attributed to the low noise characteristics of a controlled impedance backplane; implementation of module front end standardized bus interfaces; and the Bus Arbitrator, Repeater, Terminator module.