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dc.contributor.authorZhou, R.
dc.contributor.authorMavretic, A.
dc.date.accessioned2016-07-01T19:29:17Z
dc.date.available2016-07-01T19:29:17Z
dc.date.issued1986-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/615390
dc.descriptionInternational Telemetering Conference Proceedings / October 13-16, 1986 / Riviera Hotel, Las Vegas, Nevadaen_US
dc.description.abstractA general tendency in the digital communication systems is toward multi-level signalling in order to increase the information rate over a fixed bandwidth channel. Multiple valued logic circuits hold the promising potential for this application. including digital modulation, signal power spectrum shaping and coding techniques. Thispaper will present a novel design of quaternary modular adder circuit using multi-semiconductor technology — BI-CMOS process. This circuit demonstrates many advantages in improving noise margin and speed as well as in reducing transistor counts and chip areas. Some comparison with its binary counterpart and SPICE simulation results will also be given. Due to growing interest in multiple-level signalling combining with multiple-valued logic technology in digital communication systems, this paper will also discuss the application of modular adder in correlative coding techniques for spectral shaping. where quaternary modular adder performs efficiently in encoding input signal of non binary form at the transmitting end and in reconstructing the original data input at the receiving end. It also can allieviate the pin and interconnection requirements for equivalent information transfer.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.titleQUATERNARY MODULAR ADDER WITH APPLICATION IN CORRELATIVE CODING TECHNIQUESen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentBoston University, College of Engineeringen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-06-22T23:00:20Z
html.description.abstractA general tendency in the digital communication systems is toward multi-level signalling in order to increase the information rate over a fixed bandwidth channel. Multiple valued logic circuits hold the promising potential for this application. including digital modulation, signal power spectrum shaping and coding techniques. Thispaper will present a novel design of quaternary modular adder circuit using multi-semiconductor technology — BI-CMOS process. This circuit demonstrates many advantages in improving noise margin and speed as well as in reducing transistor counts and chip areas. Some comparison with its binary counterpart and SPICE simulation results will also be given. Due to growing interest in multiple-level signalling combining with multiple-valued logic technology in digital communication systems, this paper will also discuss the application of modular adder in correlative coding techniques for spectral shaping. where quaternary modular adder performs efficiently in encoding input signal of non binary form at the transmitting end and in reconstructing the original data input at the receiving end. It also can allieviate the pin and interconnection requirements for equivalent information transfer.


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