A SURVEY AND COMPARISON OF MULTIPLICATION TECHNIQUES FOR ANALOG VLSI

Abstract

This paper addresses the problem of analog multiplication for analog VLSI implementation, with particular emphasis on multiplication accuracy (low intrinsic noise) and speed. High-speed low noise analog multiplication for analog VLSI has very important implications in analog signal processing, signal generation, signal detection and ultra precise frequency and phase control. The various candidate multiplier mechanisms and circuits proposed todate are surveyed and a comprehensive comparison of them developed, leading to the conclusion that the Steerable Localized Injection Multiplier (SLIM) holds the greatest promise for low noise and high speed analog VLSI multiplication.