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dc.contributor.authorMavretic, A.
dc.contributor.authorZrilic, D.
dc.contributor.authorZhou, R.
dc.date.accessioned2016-07-07T22:29:40Z
dc.date.available2016-07-07T22:29:40Z
dc.date.issued1985-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/615763
dc.descriptionInternational Telemetering Conference Proceedings / October 28-31, 1985 / Riviera Hotel, Las Vegas, Nevadaen_US
dc.description.abstractA new realization of non-recursive digital filters using operation on ternary delta modulated signal is proposed. Direct operation on ternary delta modulated signal will be derived mathematically and a hardware implementation of ternary arithmetic operation will be shown. The primary advantage of the ternary scheme is the simplicity of the hardware and reduction in connections and interconnections between chips and interchips. The results show the possibility of applying ternary arithmetic operation in variety of areas including VLSI environment.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.titleAPPLICATION OF TERNARY LOGIC AND DELTA MODULATION IN DIGITAL FILTER REALIZATIONen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentBoston University College of Engineeringen
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-04-26T00:29:22Z
html.description.abstractA new realization of non-recursive digital filters using operation on ternary delta modulated signal is proposed. Direct operation on ternary delta modulated signal will be derived mathematically and a hardware implementation of ternary arithmetic operation will be shown. The primary advantage of the ternary scheme is the simplicity of the hardware and reduction in connections and interconnections between chips and interchips. The results show the possibility of applying ternary arithmetic operation in variety of areas including VLSI environment.


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