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dc.contributor.authorAdegbija, Tosiron
dc.contributor.authorGordon-Ross, Ann
dc.date.accessioned2018-08-20T23:55:50Z
dc.date.available2018-08-20T23:55:50Z
dc.date.issued2018-03
dc.identifier.citationAdegbija T, Gordon-Ross A. TaPT: Temperature-Aware Dynamic Cache Optimization for Embedded Systems. Computers. 2018; 7(1):3.en_US
dc.identifier.issn2073-431X
dc.identifier.doi10.3390/computers7010003
dc.identifier.urihttp://hdl.handle.net/10150/628586
dc.description.abstractEmbedded systems have stringent design constraints, which has necessitated much prior research focus on optimizing energy consumption and/or performance. Since embedded systems typically have fewer cooling options, rising temperature, and thus temperature optimization, is an emergent concern. Most embedded systems only dissipate heat by passive convection, due to the absence of dedicated thermal management hardware mechanisms. The embedded system's temperature not only affects the system's reliability, but can also affect the performance, power, and cost. Thus, embedded systems require efficient thermal management techniques. However, thermal management can conflict with other optimization objectives, such as execution time and energy consumption. In this paper, we focus on managing the temperature using a synergy of cache optimization and dynamic frequency scaling, while also optimizing the execution time and energy consumption. This paper provides new insights on the impact of cache parameters on efficient temperature-aware cache tuning heuristics. In addition, we present temperature-aware phase-based tuning, TaPT, which determines Pareto optimal clock frequency and cache configurations for fine-grained execution time, energy, and temperature tradeoffs. TaPT enables autonomous system optimization and also allows designers to specify temperature constraints and optimization priorities. Experiments show that TaPT can effectively reduce execution time, energy, and temperature, while imposing minimal hardware overhead.en_US
dc.description.sponsorshipNational Science Foundation [CNS-0953447]en_US
dc.language.isoenen_US
dc.publisherMDPIen_US
dc.relation.urlhttp://www.mdpi.com/2073-431X/7/1/3en_US
dc.rights© 2017 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) licenseen_US
dc.subjectdynamic thermal managementen_US
dc.subjectlow-power embedded systemsen_US
dc.subjectphase-based tuningen_US
dc.subjecttemperature-aware tuningen_US
dc.subjectenergy savingsen_US
dc.subjectdynamic optimizationen_US
dc.subjectconfigurable cachesen_US
dc.subjectdynamic voltage and frequency scalingen_US
dc.titleTaPT: Temperature-Aware Dynamic Cache Optimization for Embedded Systemsen_US
dc.typeArticleen_US
dc.contributor.departmentUniv Arizona, Dept Elect & Comp Engnen_US
dc.identifier.journalCOMPUTERSen_US
dc.description.noteOpen access journal.en_US
dc.description.collectioninformationThis item from the UA Faculty Publications collection is made available by the University of Arizona with support from the University of Arizona Libraries. If you have questions, please contact us at repository@u.library.arizona.edu.en_US
dc.eprint.versionFinal published versionen_US
dc.source.journaltitleComputers
dc.source.volume7
dc.source.issue1
dc.source.beginpage3
refterms.dateFOA2018-08-20T23:55:51Z


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