Fault-Tolerant Probabilistic Gradient-Descent Bit Flipping Decoder
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Fault-Tolerant Probabilistic ...
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Final Accepted Manuscript
Affiliation
Univ Arizona, Dept Elect & Comp EngnIssue Date
2014-07-30Keywords
Bit-flipping algorithmlow-density parity check codes
decoding by unreliable hardware
fault-tolerance
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IEEECitation
O. A. Rasheed, P. Ivaniš and B. Vasić, "Fault-Tolerant Probabilistic Gradient-Descent Bit Flipping Decoder," in IEEE Communications Letters, vol. 18, no. 9, pp. 1487-1490, Sept. 2014, doi: 10.1109/LCOMM.2014.2344031.Journal
IEEE COMMUNICATIONS LETTERSRights
Copyright © 2014 IEEE.Collection Information
This item from the UA Faculty Publications collection is made available by the University of Arizona with support from the University of Arizona Libraries. If you have questions, please contact us at repository@u.library.arizona.edu.Abstract
We propose a gradient descent type bit flipping algorithm for decoding low density parity check codes on the binary symmetric channel. Randomness introduced in the bit flipping rule makes this class of decoders not only superior to other decoding algorithms of this type, but also robust to logic-gate failures. We report a surprising discovery that for a broad range of gate failure probability our decoders actually benefit from faults in logic gates which serve as an inherent source of randomness and help the decoding algorithm to escape from local minima associated with trapping sets.ISSN
1089-7798Version
Final accepted manuscriptae974a485f413a2113503eed53cd6c53
10.1109/lcomm.2014.2344031