Two-Bit Bit Flipping Algorithms for LDPC Codes and Collective Error Correction
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Two-Bit Bit Flipping Algorithms ...
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Final Accepted Manuscript
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Univ Arizona, Dept Elect & Comp EngnIssue Date
2014-04
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IEEECitation
D. V. Nguyen and B. Vasic, "Two-Bit Bit Flipping Algorithms for LDPC Codes and Collective Error Correction," in IEEE Transactions on Communications, vol. 62, no. 4, pp. 1153-1163, April 2014, doi: 10.1109/TCOMM.2014.021614.130884.Rights
© 2014 IEEE.Collection Information
This item from the UA Faculty Publications collection is made available by the University of Arizona with support from the University of Arizona Libraries. If you have questions, please contact us at repository@u.library.arizona.edu.Abstract
A new class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel is proposed. Compared to the regular (parallel or serial) bit flipping algorithms, the proposed algorithms employ one additional bit at a variable node to represent its "strength." The introduction of this additional bit allows an increase in the guaranteed error correction capability. An additional bit is also employed at a check node to capture information which is beneficial to decoding. A framework for failure analysis and selection of two-bit bit flipping algorithms is provided. The main component of this framework is the (re)definition of trapping sets, which are the most "compact" Tanner graphs that cause decoding failures of an algorithm. A recursive procedure to enumerate trapping sets is described. This procedure is the basis for selecting a collection of algorithms that work well together. It is demonstrated that decoders which employ a properly selected group of the proposed algorithms operating in parallel can offer high speed and low error floor decoding.ISSN
0090-6778Version
Final accepted manuscriptae974a485f413a2113503eed53cd6c53
10.1109/tcomm.2014.021614.130884