SIMULATION OF CLOCKED DIGITAL LOGIC IN HARDWARE C (HWC)

Abstract

Hardware C (hereafter HWC) is an original hardware description language designed to imitate the syntax of C family of languages. HWC is composed of two parts, a compiler and a simulator. The HWC compiler parses HWC files (*.hwc) and compiles the code into a wiring diagram, which describe logic gates and the wires between them. The simulator parses the wiring diagram files (*.wire) and builds a runnable representation of that part list by connecting the wires and simulating a clock cycle with inputs. In this project, the simulator was redesigned from C into Python and the components of the wiring diagram were fully flushed out to support the simulator. This paper discusses the goal of HWC, recaps previous work on HWC, discusses the additions to the compiler, and explains the various stages of simulation HWC supports. After explaining HWC simulation in its entirety, the practical and pedagogical applications of HWC simulation are discussed. It is believed that HWC’s C-styled design could help students understand the CPU and various other hardware component functions.