Atomic Layer Deposited (ALD) SiO2 with HiK/Metal Gate Dielectric for High Voltage Analog and I/O Devices on Silicon and High Mobility Silicon Germanium (SiGe) Channels: Planar, FinFET and GAA Transistor Architecture
Author
Siddiqui, ShahabIssue Date
2024Keywords
CMOS ScalingDeposited Gate Oxide
HiK/Metal Gate
I/O Transistors
Nano-Sheet Transistor
Silicon Germanium (SiGe)
Advisor
Melde, Kathleen L.
Metadata
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The University of Arizona.Rights
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction, presentation (such as public display or performance) of protected items is prohibited except with permission of the author.Abstract
A highly reliable SiO2 deposited by atomic layer deposition (ALD) as an I/O gate dielectric layer with high k/metal gate (HKMG) in high voltage I/O field effect transistor (FETs) for advanced CMOS technologies has been demonstrated. Improved process control, better gate oxide conformality, superior dielectric reliability (over CVD SiO2), and equivalent uniformity and reliability compared to thermal oxide proves its usefulness for FinFET, Gate-all-around(GAA), FDSOI and heterostructure Si/SiGe I/O devices. For the first-time, use of ALD SiO2 with novel interface layer results in reduced interfacial regrowth on SiGe channel, which when combined with novel post deposition nitridation and annealing for optimal performance, is an attractive I/O gate oxide option for alternate channel architectures.Type
Electronic Dissertationtext
Degree Name
Ph.D.Degree Level
doctoralDegree Program
Graduate CollegeElectrical & Computer Engineering
